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AJA NTV2 SDK
18.1.0.2262
NTV2 SDK 18.1.0.2262
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Go to the source code of this file.
Classes | |
| struct | ntv2_genlock2_data |
| class | NTV2MetalE2E |
Macros | |
| #define | ntv2Message(string, ...) printf(string, __VA_ARGS__) |
| #define | DTR_EMPTY 0x04 |
| #define | GENL_SPI_READ_FIFO_EMPTY 0x01 |
Variables | |
| static struct ntv2_genlock2_data | s_rc32012a_broadcast_1485 [] |
| const uint32_t | ntv2_reg_spi_ip_status = 0x8008 |
| const uint32_t | ntv2_reg_spi_reset = 0x8010 |
| const uint32_t | ntv2_reg_spi_control = 0x8018 |
| const uint32_t | ntv2_reg_spi_status = 0x8019 |
| const uint32_t | ntv2_reg_spi_write = 0x801a |
| const uint32_t | ntv2_reg_spi_read = 0x801b |
| const uint32_t | ntv2_reg_spi_slave = 0x801c |
| const uint32_t | ntv2_reg_out_freq1 = 0x36c1 |
| const uint32_t | ntv2_reg_out_freq2 = 0x36c2 |
| const uint32_t | ntv2_reg_out_freq3 = 0x36c3 |
| const uint32_t | ntv2_reg_out_freq4 = 0x36c4 |
| const uint32_t | ntv2_reg_out_freq5 = 0x36c5 |
| const uint32_t | ntv2_reg_genlock_reset = 0x30 |
| const uint32_t | ntv2_genlock_reset_shift = 6 |
| const uint32_t | ntv2_genlock_reset_mask = 0x40 |
| const int64_t | c_spi_timeout = 10000 |
| #define DTR_EMPTY 0x04 |
Definition at line 409 of file ntv2metale2e.h.
| #define GENL_SPI_READ_FIFO_EMPTY 0x01 |
Definition at line 410 of file ntv2metale2e.h.
| #define ntv2Message | ( | string, | |
| ... | |||
| ) | printf(string, __VA_ARGS__) |
Definition at line 408 of file ntv2metale2e.h.
| const int64_t c_spi_timeout = 10000 |
Definition at line 431 of file ntv2metale2e.h.
| const uint32_t ntv2_genlock_reset_mask = 0x40 |
Definition at line 429 of file ntv2metale2e.h.
| const uint32_t ntv2_genlock_reset_shift = 6 |
Definition at line 428 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_genlock_reset = 0x30 |
Definition at line 427 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_out_freq1 = 0x36c1 |
Definition at line 421 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_out_freq2 = 0x36c2 |
Definition at line 422 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_out_freq3 = 0x36c3 |
Definition at line 423 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_out_freq4 = 0x36c4 |
Definition at line 424 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_out_freq5 = 0x36c5 |
Definition at line 425 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_control = 0x8018 |
Definition at line 415 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_ip_status = 0x8008 |
Definition at line 412 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_read = 0x801b |
Definition at line 418 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_reset = 0x8010 |
Definition at line 414 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_slave = 0x801c |
Definition at line 419 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_status = 0x8019 |
Definition at line 416 of file ntv2metale2e.h.
| const uint32_t ntv2_reg_spi_write = 0x801a |
Definition at line 417 of file ntv2metale2e.h.
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static |
Definition at line 21 of file ntv2metale2e.h.